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GD-320240T35N001A
Goldconn
9013803010
| Availability: | |
|---|---|
| General Information | ||
| ITEM | STANDARD VALUES | UNITS |
| LCD type | 3.5’’TFT | -- |
| Dot arrangement | 320(RGB)×240 | dots |
| Color filter array | RGB vertical stripe | -- |
| Display mode | TN / Transmission / Normally White | -- |
| Gray Scale Inversion Direction | 6 O’clock | -- |
| Eyes Viewing Direction | 12 O’clock | -- |
| Driver IC | HX8238-D | -- |
| Module size | 76.70(W)×63.70(H)×3.26(T) | mm |
| Active area | 70.08(W)×52.56(H) | mm |
| Dot pitch | 0.219(W)×0.219(H) | mm |
| Interface | 24-bit RGB interface | -- |
| Operating temperature | -20 ~ +70 | °C |
| Storage temperature | -30 ~ +80 | °C |
| Back Light | 6 White LED | -- |
| Weight | TBD | g |
General Information
| PIN NO. | PIN NAME | DESCRIPTION |
| 1~2 | LEDK | LED backlight cathode |
| 3~4 | LEDA | LED backlight anode |
| 5 | YU | RTP (No connection) |
| 6 | XR | RTP (No connection) |
| 7 | NC | No connection |
| 8 | RESET | Reset signal input terminal, active at ‘L’ |
| 9 | CS | Chip select signal input terminal, Active at ‘L’ |
| 10 | SCK | Write signal input terminal, Active at ‘L‘. |
| Synchronizing clock signal in SPI mode. | ||
| 11 | SDA | SPI interface input pin. |
| 12~19 | B0~B7 | Data bus |
| 20~27 | G0~G7 | Data bus |
| 28~35 | R0~R7 | Data bus |
| 36 | HSYNC | Line synchronizing signal for RGB interface operation. |
| 37 | VSYNC | Frame synchronizing signal for RGB interface operation. |
| 38 | DCLK | Dot clock signal for RGB interface operation. |
| 39,40 | NC | No connection |
| 41,42 | VCC | System power supply. |
| 43 | YD | RTP (No connection) |
| 44 | XL | RTP (No connection) |
| 45~47 | NC | No connection |
| 48 | SEL2 | Define the input interface(Note1) |
| 49 | SEL1 | Define the input interface(Note1) |
| 50 | SEL0 | Define the input interface(Note1) |
| 51 | NC | No connection |
| 52 | DE | Data ENEABLE signal for RGB interface operation. |
| 53,54 | GND | Power ground |
| General Information | ||
| ITEM | STANDARD VALUES | UNITS |
| LCD type | 3.5’’TFT | -- |
| Dot arrangement | 320(RGB)×240 | dots |
| Color filter array | RGB vertical stripe | -- |
| Display mode | TN / Transmission / Normally White | -- |
| Gray Scale Inversion Direction | 6 O’clock | -- |
| Eyes Viewing Direction | 12 O’clock | -- |
| Driver IC | HX8238-D | -- |
| Module size | 76.70(W)×63.70(H)×3.26(T) | mm |
| Active area | 70.08(W)×52.56(H) | mm |
| Dot pitch | 0.219(W)×0.219(H) | mm |
| Interface | 24-bit RGB interface | -- |
| Operating temperature | -20 ~ +70 | °C |
| Storage temperature | -30 ~ +80 | °C |
| Back Light | 6 White LED | -- |
| Weight | TBD | g |
General Information
| PIN NO. | PIN NAME | DESCRIPTION |
| 1~2 | LEDK | LED backlight cathode |
| 3~4 | LEDA | LED backlight anode |
| 5 | YU | RTP (No connection) |
| 6 | XR | RTP (No connection) |
| 7 | NC | No connection |
| 8 | RESET | Reset signal input terminal, active at ‘L’ |
| 9 | CS | Chip select signal input terminal, Active at ‘L’ |
| 10 | SCK | Write signal input terminal, Active at ‘L‘. |
| Synchronizing clock signal in SPI mode. | ||
| 11 | SDA | SPI interface input pin. |
| 12~19 | B0~B7 | Data bus |
| 20~27 | G0~G7 | Data bus |
| 28~35 | R0~R7 | Data bus |
| 36 | HSYNC | Line synchronizing signal for RGB interface operation. |
| 37 | VSYNC | Frame synchronizing signal for RGB interface operation. |
| 38 | DCLK | Dot clock signal for RGB interface operation. |
| 39,40 | NC | No connection |
| 41,42 | VCC | System power supply. |
| 43 | YD | RTP (No connection) |
| 44 | XL | RTP (No connection) |
| 45~47 | NC | No connection |
| 48 | SEL2 | Define the input interface(Note1) |
| 49 | SEL1 | Define the input interface(Note1) |
| 50 | SEL0 | Define the input interface(Note1) |
| 51 | NC | No connection |
| 52 | DE | Data ENEABLE signal for RGB interface operation. |
| 53,54 | GND | Power ground |
